Embodiments of the present invention relate to clock generators for integrated circuits and, in particular, to clock generators that conserve power and provide stable operation.
Modern processing systems employ integrated circuits that rely on clock signals for timing and synchronization. Often, such clock signals are derived from oscillator devices, such as crystal-based oscillators or ceramic resonator-based oscillators. When an integrated circuit supplies an excitation signal to the crystal or ceramic resonator, the device responds by generating response signals that oscillate at a pre-defined frequency.
FIG. 1 illustrates two different oscillator structures. In FIG. 1(a), the oscillator is shown as including a crystal XTAL, an inverter INV and a bias resistor RBIAS, each connected to the other in parallel. The crystal XTAL is a material that generates oscillation signals in response to an activation signal, which is applied by the inverter INV. The resistor RBIAS is a resistor that sets a common mode bias for an operating point of the inverter and increases its gain. FIG. 1(a) illustrates a pair of capacitors COSC1, COSC2, each of which is connected between ground and a respective terminal of the crystal XTAL. The capacitors COSC1, COSC2 may provide stability in the face of process, voltage and/or temperature variations of the oscillator. Typically, the crystal XTAL, the resistors RBIAS and capacitors COSC1, COSC2 are discrete components that reside outside of the integrated circuit that generates a clock signal. The inverter may reside within the integrated circuit.
The inverter is an active circuit component that draws power during operation. Inverter outputs typically involve unregulated currents that, in many cases, exceed an amount of current necessary to drive the crystal XTAL. The oscillator circuit of FIG. 1(a), therefore, is not an energy-efficient structure.
In FIG. 1(b), the oscillator is shown as including a crystal XTAL, bias resistor RBIAS and capacitors COSC1, COSC2 just as in the FIG. 1(a) structure. Rather than include the inverter INV of the FIG. 1(a) structure, the FIG. 1(b) structure includes a conductance stage, formed of a transistor TR1 and bias current source IBIAS. The current source IBIAS provides a bias on the transistor, which sets gain around the crystal XTAL. In some cases, the current source may provide a constant current to the biased transistor but, in other cases, the current source may vary dynamically during operation. In this latter case, the oscillator may be controlled by an amplitude control system which varies the current output by the current source based on an amplitude of signals (XTAL1) detected at the crystal XTAL.
Dynamic variation of the current can achieve good current conservation during operation of an oscillator. When an oscillator first is engaged, TR1 is biased by a relatively large current to provide a good response by the crystal XTAL. As the oscillator reaches steady state operation, crystal oscillation may be maintained by a driving current of lower magnitude.
FIG. 1(b) also illustrates a clock generator circuit that may be used with an oscillator. The clock generator includes a resistor-capacitor filter structure and one or more inverters coupled in cascade. During operation, the crystal generates a signal XTAL1 on the XTAL pin that exhibits a generally sinusoidal character. The XTAL1 signal is AC-coupled to the inverters. In ideal operating circumstances, a voltage at the input of the inverter should oscillate about a triggering point of the inverter. The inverter would respond to the generally sinusoidal input signal presented at its input by generating a binary output signal having a frequency that matches the frequency of the sinusoidal signal.
The inventor has determined that dynamic variation of the current source that drives the oscillator can lead to variation of common mode operating points of the signal input to the inverter within the clock generator. Variation of the common mode operation point can lead to generation of an output clock signal that does not have a 50% duty cycle. In extreme cases, it can lead to loss of the output clock signal altogether. Accordingly, the inventor identified a need for a clock generator that reliably generates an output clock signal in the presence of common mode variation on its input signals. Moreover, the inventor identified a need in the art for a clock generator that operates reliably with a current-controlled oscillator.